High capacity photonic integrated switching circuits

As the demand for high-capacity data transfer keeps increasing in high performance computing and in a broader range of system area networking environments; reconfiguring the strained networks at ever faster speeds with larger volumes of traffic has become a huge challenge. Formidable bottlenecks appear at the physical layer of these switched interconnects due to its energy consumption and footprint. The energy consumption of the highly sophisticated but increasingly unwieldy electronic switching systems is growing rapidly with line rate, and their designs are already being constrained by heat and power management issues. The routing of multi-Terabit/second data using optical techniques has been targeted by leading international industrial and academic research labs. So far the work has relied largely on discrete components which are bulky and incurconsiderable networking complexity. The integration of the most promising architectures is required in a way which fully leverages the advantages of photonic technologies. Photonic integration technologies offer the promise of low power consumption and reduced footprint. In particular, photonic integrated semiconductor optical amplifier (SOA) gate-based circuits have received much attention as a potential solution. SOA gates exhibit multi-terahertz bandwidths and can be switched from a high-gain state to a high-loss state within a nanosecond using low-voltage electronics. In addition, in contrast to the electronic switching systems, their energy consumption does not rise with line rate. This dissertation will discuss, through the use of different kind of materials and integration technologies, that photonic integrated SOA-based optoelectronic switches can be scalable in either connectivity or data capacity and are poised to become a key technology for very high-speed applications. In Chapter 2, the optical switching background with the drawbacks of optical switches using electronic cores is discussed. The current optical technologies for switching are reviewed with special attention given to the SOA-based switches. Chapter 3 discusses the first demonstrations using quantum dot (QD) material to develop scalable and compact switching matrices operating in the 1.55µm telecommunication window. In Chapter 4, the capacity limitations of scalable quantum well (QW) SOA-based multistage switches is assessed through experimental studies for the first time. In Chapter 5 theoretical analysis on the dependence of data integrity as ultrahigh line-rate and number of monolithically integrated SOA-stages increases is discussed. Chapter 6 presents some designs for the next generation of large scale photonic integrated interconnects. A 16x16 switch architecture is described from its blocking properties to the new miniaturized elements proposed. Finally, Chapter 7 presents several recommendations for future work, along with some concluding remark

320-to-10 Gbit/s all-optical demultiplexing using sum-frequency generation in PPLN waveguide

A 320-to-10 Gbit/s all-optical demultiplexer based on sum-frequency generation in a periodically-poled lithium niobate (PPLN) waveguide is demonstrated. A bit-error-rate of 10-9 is achieved with a power penalty of 1.5 dB

Receiver Calibration and Quantum Random Number Generation for Continuous-variable Quantum Key Distribution

The desire for secure communications and the advent of quantum computing has spurred innovation into key-distribution technologies that are secure against future quantum computers. Computationally secure solutions based on post quantum algorithms and physically-secure solutions using either discrete-variable or continuous-variable quantum key distribution (CV-QKD) have been proposed. The attraction with CV-QKD systems in particular is the potential to leverage the vast knowledge base and access scaling benefits of photonic integration for conventional coherent optical communication for key distribution. CV-QKD requires detailed characterization of coherent receiver hardware, specifically noise generated by electronics and shot noise caused by the local oscillator (LO) laser. This work investigates the temporal stability of the receiver noise power which defines the amount of trusted noise in the quantum link used to compute the secret key rate (SKR). Depending on the noise power’s stability, this characterization must be repeated often, typically in the order of seconds. Therefore, this work explores the possibility of using the shot noise measurement as a source of quantum random numbers, which is required by a CV-QKD transceiver. This work enables further integration of the CV-QKD hardware, removing the need for a separate quantum random number generator (QRNG)

Scalable quantum dot based optical interconnects

Scalable quantum dot based optical switches offer energy-efficient low-latency data routing. Low power penalty routing over multiple stages are feasible with with the prospect of larger scale photonic integration

Monolithic active-passive 16x6 optoelectronic switch

We present what is to our knowledge the first active-passive monolithically integrated 16×16 switch. The active InP/InGaAsP elements provide semiconductor optical amplifier gates in a multistage rearrangeably nonblocking switch design. Thirty-two representative connections, including the shortest, longest, and comprehensive range of intermediate paths have been assessed across the switch circuit. The 10¿¿Gb/s signal routing is demonstrated with an optical signal-to-noise ratio up to 28.3¿¿dB/0.1¿¿nm and a signal extinction ratio exceeding 50 dB

Monolithic active-passive 16x6 optoelectronic switch

We present what is to our knowledge the first active-passive monolithically integrated 16×16 switch. The active InP/InGaAsP elements provide semiconductor optical amplifier gates in a multistage rearrangeably nonblocking switch design. Thirty-two representative connections, including the shortest, longest, and comprehensive range of intermediate paths have been assessed across the switch circuit. The 10¿¿Gb/s signal routing is demonstrated with an optical signal-to-noise ratio up to 28.3¿¿dB/0.1¿¿nm and a signal extinction ratio exceeding 50 dB

Dynamic multi-path routing in a monolithic active-passive 16×16 optoelectronic switch

An active-passive integrated 16×16 SOA-based switch is demonstrated with a control interface for reconfigurable routing and power equalization between multiple connections. 10Gb/s data is routed with 28.3 dB/0.1 nm OSNR and <10-9 bit error rate

Integrated optical switch matrices for packet data networks

Integrated circuit technologies are enabling intelligent, chip-based, optical packet switch matrices. Rapid real-time re-configurability at the photonic layer using integrated circuit technologies is expected to enable cost-effective, energy-efficient, and transparent data communications. InP integrated photonic circuits offer high-performance amplifiers, switches, modulators, detectors, and de/multiplexers in the same wafer-scale processes. The complexity of these circuits has been transformed as the process technologies have matured, enabling component counts to increase to many hundreds per chip. Active–passive monolithic integration has enabled switching matrices with up to 480 components, connecting 16 inputs to 16 outputs. Integrated switching matrices route data streams of hundreds of gigabits per second. Multi-path and packet time-scale switching have been demonstrated in the laboratory to route between multiple fibre connections. Wavelength-granularity routing and monitoring is realised inside the chip. In this paper, we review the current status in InP integrated photonics for optical switch matrices, paying particular attention to the additional on-chip functions that become feasible with active component integration. We highlight the opportunities for introducing intelligence at the physical layer and explore the requirements and opportunities for cost-effective, scalable switching